J5 is alive, and is definitely not called johnny or a robot in a kids sci-fi film. J5 is the mystery connector footprint on the bottom of the Pi Zero. I have been puzzling over what it was intended for since getting my Pi Zero from Pimoroni. Asking around amongst those who would know more than me about it (Not difficult to find) the hot favourite was a JTAG port but no one was entirely sure and there was no pinout. An extensive google around was surprisingly information free.
Time then for some reverse engineering, first stop was a USB microscope and a look see for obvious pin functions, gotta tackle the low hanging fruit first. Taking pin 1 to be the pin nearest the J5 ID we can see the footprint is for an 8 pin connector and the body or screen is not connected. 1 is the Pi system reset or run pin as it is labeled, 4 and 7 are ground connections. OK that leaves 5 pins to go. I visually traced the connections and lost them in to the maze of CPU via’s. As other than the reset they did not go to the GPIO pins I could rule out an easy hit as to what they were. The up side is if they were JTAG, it would have to be dedicated pins, not GPIO pins, and therefore projects could be debugged even with a phat in place. Hmmm what were those other 5 pins for. Normally at this point I would start on in with a multi meter or a scope and see what I could find out next. But serendipity smiled upon me, in that way it never normally does.
Putting some time into a side project (building a Graphite graphing server) I was working with a Raspberry Pi B+. Purely as I tend to mostly use Pi2’s now and was using up any older ones that were lying around. Embedding them irretrievably into other things. Fiddling with the board during one of many mental luls, I noticed the same mystery footprint on the board directly under the HDMI video connector. In fact it is so much the same it is also labelled J5. Cross referencing the ground pin outs that we know from the Pi Zero we get a match. What is more the 5 pins we had not identified are broken out to pogo pin pads bang next to the footprint. All along with nice labels. Combining the data we have then gives us the following table:-
Pin No | Pi Zero Function | Pi B+ Function | Comment |
1 | Pi System Reset | ? | Pull low to reset the Pi |
2 | ? | TRST_N | TAP Reset pull low to reset the TAP |
3 | ? | TDI | Test Data In |
4 | Gnd | Gnd | Signal Gnd |
5 | ? | TDO | Test Data Out |
6 | ? | TMS | Test Mode Select |
7 | Gnd | Gnd | Signal Gnd |
8 | ? | TCK | Test Clock |
Some further technical info on TAP & JTAG can be found here worth a look at to illustrate some of the concepts behind JTAG. OK, all well and good, what is left to do, identify what sort of connector J5 actually is and make up a JTAG lead for it then connect it up and see if we are right.
My guess is that it’s to an 8 pin FPC (Flat Pin Connector)
I’ve just taken delivery of my second Pi Zero (a V1.3 version) looking very carefully at the connectors with a 10x loupe magnifier I notice very small point indentations on several of the gold plated test points on the underside of the board.
In particular, J5 shows an indents at alternate ends of the connectors (GPIO connection to the top of the diagram)
-0
0-
-0
0-
-0
0-
-0
0-
My guess is these are used for programming the bootloader/ doing tests during manufacture, but it’ll get done on some sort of jig, with spring loaded needle-pointed connectors.
Other pads which have signs of having being connected (reading left to right) are
PP1, PP6, PP40, PP22, PP23, PP8, PP5, PP20, .
I just got a v1.3 from Micro Center last week and I checked J5 and the test points under my stereoscope and saw all the same pads on J5, with the same pattern, as well as PP1, PP6, PP40, PP22, PP23, PP8, PP36, and PP20 had been probed. I find it very interesting that we differ by PP5 and PP36.
Indeed I suspect there may have been a change between versions.
Thanks for this research !!! I had a hard time finding that on google ! i first tought that it was a third USB micro connector pad, but it turns out to be a JTAG :p
Any success with this? It would be so nice to use J5 for JTAG instead of sacrificing GPIO pins to do the same.
it should be VideoCore IV JTAG. connector is 8pin 0.5mm pitch fpc.
not usable for arm debugging
Agreed
This is the feedback I have received also. must admit, being interested in bare metal programming I was disappointed.
According to http://sysprogs.com/VisualKernel/tutorials/raspberry/jtagsetup/ , ARM JTAG is exposed on GPIO pins as an alternate mode. I’m not sure why the ARM core wouldn’t be daisy-chained with the GPU’s JTAG, but it seems it isn’t…
Having JTAG exposed through the .1″ header will make it far easier to connect to than it would be on an insanely tiny connector like J5!
Agreed